vrlqnm

Vector Rotate Left Quadword then AND with Mask VX-form

vrlqnm VRT,VRA,VRB

Rotates the contents of a vector register left by a specified number of bits and performs a bitwise AND operation with a mask derived from another vector register.

Details

The vrlqnm instruction rotates the contents of VSR[VRA+32] left by a number of bits specified in VSR[VRB+32].bits[57:63], then performs a bitwise AND operation with a mask generated from bits 41:47 and 49:55 of VSR[VRB+32]. The result is stored in VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()

b ←VSR[VRB+32].bit[41:47]
e ←VSR[VRB+32].bit[49:55]
n ←VSR[VRB+32].bit[57:63]
r ←ROTL128(VSR[VRA+32],n)
m ←MASK128(b, e)
VSR[VRT+32] ←r & m

Programming Note

The vrlqnm instruction is used for vectorized operations involving rotation and masking of quadword data. Ensure that the Vector Facility (VEC) bit in the Machine State Register (MSR) is set to 1, otherwise a Vector_Unavailable exception will be raised. The mask generation from bits 41:47 and 49:55 of VSR[VRB+32] should be carefully managed to achieve the desired bitwise AND operation result.

Example

vrlqnm v1, v2, v3

Encoding

Binary Layout
4
0
VRT
6
VRA
11
VRB
16
 
Format VX-form
Opcode 0x10000145
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register