vmsummbm

Vector Multiply-Sum Mixed Byte Modulo

vmsummbm VRT,VRA,VRB,VRC

Performs a vector multiply-sum operation with mixed byte elements.

Details

For each integer value i from 0 to 3, do the following. For each integer value j from 0 to 3, do the following. The signed integer value in byte element j of word element i of VSR[VRA+32] is multiplied by the unsigned integer value in byte element j of word element i of VSR[VRB+32]. The sum of the four products is added to the signed integer value in word element i of VSR[VRC+32]. The low-order 32 bits of the result are placed into word element i of VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 3
    temp ←EXTS(VSR[VRC+32].word[i])
    do j = 0 to 3
        src1 ←EXTS(VSR[VRA+32].word[i].byte[j])
        src2 ←EXTZ(VSR[VRB+32].word[i].byte[j])
        temp ←temp + (src1 × src2)
    end
    VSR[VRT+32].word[i] ←CHOP32(temp)
end

Programming Note

This instruction is useful for performing vectorized multiply-sum operations on byte elements. Ensure that the vector registers are properly aligned and that the Vector Facility (MSR.VEC) is enabled to avoid exceptions. The result is truncated to 32 bits, so be cautious of overflow if the sum exceeds this range.

Example

vmsummbm v1, v2, v3, v4

Encoding

Binary Layout
18
0
VRT
6
VRA
11
VRB
16
VRC
21
 
Format X-form
Opcode 0x10000025
Extension VMX (AltiVec)

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register
  • VRC
    Source Vector Register