sld

Shift Left Doubleword

sld RA, RS, RB

Shifts a 64-bit register left by the amount specified in RB.

Details

The contents of register RS are shifted left the number of bits specified by (RB)57:63. Bits shifted out of position 0 are lost. Zeros are supplied to the vacated positions on the right. The result is placed into register RA. Shift amounts from 64 to 127 give a zero result.

Pseudocode Operation

if (RB)57 = 0 then
    n ←(RB)58:63
    r ←ROTL64((RS), n)
    m ←MASK(0, 63-n)
else
    m ←640
RA ←r & m

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.

Example

sld r3, r4, r5

// r3 = r4 << r5 (64-bit).

Encoding

Binary Layout
31
0
RS
6
RA
11
RB
16
27
21
Rc
 
Format X-form
Opcode 0x7C000036
Extension Base
Registers Altered CR0

Operands

  • RA
    Target Register
  • RS
    Source Register
  • RB
    Shift Amount Register
  • RT
    Target General Purpose Register