vmuloub

Vector Multiply Odd Unsigned Byte

vmuloub vD, vA, vB

Multiplies odd unsigned bytes to halfwords.

Details

The Vector Multiply Odd Unsigned Byte instruction (vmuloub) multiplies the odd-numbered bytes of two vector registers and stores the results in a third vector register. The operation is performed element-wise, and the result is zero-extended to 16 bits.

Pseudocode Operation

for i = 0 to 15
    VR[D][i*2+1:i*2] ← (VR[A][i*2+1:i*2] * VR[B][i*2+1:i*2]) << 8

Programming Note

This instruction is useful for performing element-wise multiplication of odd-numbered bytes from two vectors. Ensure that the input vectors are properly aligned to avoid unexpected results. The operation does not require any special privileges, but it's important to handle potential overflow by zero-extending the 8-bit result to 16 bits.

Example

vmuloub vd, va, vb

Encoding

Binary Layout
00000
0
001000
6
VRT
16
VRA
21
VRB
26
 
Format VX-form
Opcode 0x10000008
Extension VMX (AltiVec)

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register A
  • VRB
    Source Vector Register B