vabsdub

Vector Absolute Difference Unsigned Byte

vabsdub vD, vA, vB

Returns the absolute value of the difference of integer values in byte elements.

Encoding

Binary Layout

0:5

VRT

6:10

VRA

11:15

VRB

16:20

1027

21:31

Format VA-form

Opcode 0x10000403

Extension VMX (AltiVec)

Operands

vD
Target
vA
Src A
vB
Src B
VRT
Target Vector Register
VRA
Source Vector Register
VRB
Source Vector Register

Example

vabsdub vd, va, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vabsdub, the absolute value of the difference between corresponding byte elements of VSR[VRA+32] and VSR[VRB+32] is placed into corresponding byte elements of VSR[VRT+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    src1 ← EXTZ(VSR[VRA+32].byte[i])
    src2 ← EXTZ(VSR[VRB+32].byte[i])
    if src1 > src2 then
        VSR[VRT+32].byte[i] ← CHOP8(src1 + ¬src2 + 1)
    else
        VSR[VRT+32].byte[i] ← CHOP8(src2 + ¬src1 + 1)
end

Programming Note

This instruction computes the absolute difference between corresponding bytes of two vector registers and stores the result in another register. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. The operation does not require any specific alignment, but both input vectors must be properly loaded into the specified registers. This instruction operates at a high performance due to its parallel processing capabilities on vector elements.