lvebx

Load Vector Element Byte Indexed

lvebx VRT,RA,RB

Loads a byte from memory into a vector register element.

Details

The lvebx instruction loads a byte from memory into the specified vector register based on the indexed address formed by RA and RB.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
EA ←((RA=0) ? 0 : GPR[RA]) + GPR[RB]
eb ←EA.bit[60:63]
VSR[VRT+32] ←undefined
if Big-Endian byte ordering then
    VSR[VRT+32].byte[eb] ←MEM(EA,1)
else
    VSR[VRT+32].byte[15-eb] ←MEM(EA,1)

Programming Note

The Load Vector Element instructions load the specified element into the same location in the target register as the location into which it would be loaded using the Load Vector instruction.

Example

lvebx v1, r4, r5

Encoding

Binary Layout
0
0
VRT
6
RA
11
RB
16
7
21
 
Format X-form
Opcode 0x7C00000E
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • VRT
    Target Vector Register
  • RA
    Source General Purpose Register
  • RB
    Index General Purpose Register