stfdp

Store Floating-Point Double Pair

stfdp FRSp,disp(RA)

Stores the contents of two floating-point registers into memory as a doubleword pair.

Encoding

Binary Layout

0

0:5

FRSp

6:10

RA

11:15

DS

16:20

0b00

21:31

 

Format DS-form

Opcode 0xF4000000

Extension Floating-Point

Operands

• FRSp
  Floating-Point Register Pair
• disp
  Displacement
• RA
  Base General Purpose Register

Example

stfdp f2, disp(RA)

Registers Altered

FPSCR

Related

More in Floating-Point

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The instruction stores the contents of the even-numbered register of FRSp into the doubleword in storage addressed by EA, and the contents of the odd-numbered register of FRSp into the doubleword in storage addressed by EA+8.

Operation

if RA = 0 then
    b ← 0
else
    b ← (RA)
EA ← b + EXTS(DS || 0b00)
MEM(EA, 8) ← FRSpeven
MEM(EA+8, 8) ← FRSpodd

Programming Note

The stfdp instruction is commonly used to store two consecutive double-precision floating-point numbers from the FPSCR into memory. Ensure that the base address (EA) is properly aligned to an 8-byte boundary to avoid alignment exceptions. This instruction operates at user privilege level and will raise a program interrupt if attempting to access protected memory.