fsqrt

Floating Square Root

fsqrt FRT,FRB

Computes the square root of a floating-point number.

Encoding

Binary Layout

0:5

FRT

6:10

11:15

FRB

16:20

21:30

Format X-form

Opcode 0xFC00002C

Extension Floating-Point

Operands

FRT
Target
FRB
Source

Example

fsqrt f1, f3

Registers Altered

FPSCR, CR1

Across architectures

Floating-Point Square Root : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The square root of the floating-point operand in register FRB is placed into register FRT. If the most significant bit of the resultant significand is not 1, the result is normalized. The result is rounded to the target precision under control of RN and placed into register FRT.

Operation

if FRB < 0 then
    FRT ← QNaN
    if VE = 1 then raise VXSQRT exception
else
    FRT ← sqrt(FRB)
    if most significant bit of FRT's significand is not 1 then normalize FRT
    round FRT to target precision under control of RN
end if
FPSCR.FPRF ← class and sign of FRT
if VE = 1 and result is invalid operation exception then raise VXSQRT exception

Programming Note

The fsqrt instruction computes the square root of a floating-point number. It handles negative inputs by returning a quiet NaN (QNaN) and may raise an exception if enabled. Ensure the input is non-negative to avoid unexpected results. The result is normalized and rounded according to the current rounding mode, which can affect precision.