fmrgew

Floating Merge Even Word

fmrgew FRT,FRA,FRB

Merges the even words from two floating-point registers into a third.

Details

The contents of word element 0 of FPR[FRA] are placed into word element 0 of FPR[FRT], and the contents of word element 0 of FPR[FRB] are placed into word element 1 of FPR[FRT].

Pseudocode Operation

if MSR.FP=0 then
    FP_Unavailable()
FPR[FRT].word[0] ← FPR[FRA].word[0]
FPR[FRT].word[1] ← FPR[FRB].word[0]

Programming Note

fmrgew and fmrgow are provided to support direct move operations in 32-bit mode.

Example

fmrgew f1, f2, f3

Encoding

Binary Layout
0
0
FRT
6
FRA
11
FRB
16
 
Format X-form
Opcode 0xFC00078C
Extension Floating-Point
Registers Altered FPSCR

Operands

  • FRT
    Target Floating-Point Register
  • FRA
    Source Floating-Point Register
  • FRB
    Source Floating-Point Register