lfd

Load Floating-Point Double D-form

lfd FRT,D(RA)

Loads a double-precision floating-point value from memory into a floating-point register.

Encoding

Binary Layout

0:5

FRT

6:10

11:15

16:31

Format D-form

Opcode 0xC8000000

Extension Floating-Point

Operands

FRT
Target Floating-Point Register
RA
Source General Purpose Register
D
16-bit signed displacement

Example

lfd f1, 0(r4)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The instruction loads the doubleword in storage addressed by EA into register FRT. The effective address (EA) is the sum of the contents of register RA, or the value 0 if RA=0, and the value D, sign-extended to 64 bits.

Operation

if RA = 0 then
    b ← 0
else
    b ← (RA)
EA ← b + EXTS64(D)
FRT ← MEM(EA, 8)

Programming Note

The lfd instruction is commonly used to load double-precision floating-point numbers from memory into a floating-point register. Ensure that the address specified by RA and D is properly aligned on an 8-byte boundary to avoid alignment exceptions. This instruction operates at user privilege level, so no special privileges are required.

lfd