stfd
Store Floating-Point Double D-form
stfd FRS,D(RA)
Stores a double-precision floating-point value from a register to memory.
Encoding
Binary Layout
0
0:5
FRS
6:10
RA
11:15
D
16:31
Operands
-
FRS
Floating-point Source Register -
D
16-bit signed displacement -
RA
Base General Purpose Register
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
The contents of the specified floating-point register (FRS) are stored into the double-word in storage addressed by the effective address (EA). The EA is calculated as the sum of the contents of register RA or 0 if RA=0, and the sign-extended value D.
Operation
if RA = 0 then
b ← 0
else
b ← (RA)
EA ← b + EXTS64(D)
MEM(EA, 8) ← (FRS)
Programming Note
The stfd instruction stores a double-precision floating-point value from a specified register into memory. Ensure the destination address is properly aligned to avoid alignment faults. The effective address is calculated by adding the base address in RA (or zero if RA is 0) and the sign-extended displacement D. This instruction operates at user privilege level.