dadd

Decimal Add

dadd FRT,FRA,FRB
Rc=0

Adds two 64-bit Decimal Floating Point (DFP) numbers. Used in financial calculations to avoid rounding errors.

Details

Adds two 64-bit Decimal Floating Point (DFP) numbers held in FPRs and stores the result in another FPR. DFP arithmetic maintains decimal precision without binary rounding errors, making it essential for financial applications. This instruction updates FPSCR with exception flags and condition codes based on the result.

Pseudocode Operation

FPR[FRT] ← DFP_add(FPR[FRA], FPR[FRB])
FPSCR ← updated with exception flags

Programming Note

The dadd instruction is used for adding two decimal floating-point numbers. Ensure that the source registers FRA and FRB are correctly aligned and contain valid decimal floating-point values. The result will be rounded according to the rounding mode specified in the FPSCR register's DRN field. Be aware of potential exceptions such as overflow or underflow, which may require handling in your code.

Extended Mnemonics

Extended Mnemonic Equivalent Instruction

Example

dadd f1, f2, f3

// Financial Add.

Encoding

Binary Layout
59
0
FRT
6
FRA
11
FRB
16
2
21
/
31
 
Format X-form
Opcode 0xEC000004
Extension Decimal Floating-Point
Registers Altered FPSCR, CR1

Operands

  • FRT
    Target FPR
  • FRA
    Source A
  • FRB
    Source B