xsiexpqp
VSX Scalar Insert Exponent Quad-Precision
xsiexpqp VRT,VRA,VRB
Inserts the exponent from a doubleword element of one vector register into another vector register.
Encoding
Binary Layout
18
0:5
VRT
6:10
VRA
11:15
VRB
16:31
Operands
-
VRT
Target Vector Register -
VRA
Source Vector Register -
VRB
Source Vector Register
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
The contents of bit 0 of VSR[VRA+32] are placed into bit 0 of VSR[VRT+32]. The contents of bits 49:63 of doubleword element 0 of VSR[VRB+32] are placed into bits 1:15 of VSR[VRT+32]. The contents of bits 16:127 of VSR[VRA+32] are placed into bits 16:127 of VSR[VRT+32].
Operation
if MSR.VSX=0 then
VSX_Unavailable()
else
VSR[VRT+32].bit[0] ←VSR[VRA+32].bit[0]
VSR[VRT+32].bit[1:15] ← VSR[VRB+32].dword[0].bit[49:63]
VSR[VRT+32].bit[16:127] ←VSR[VRA+32].bit[16:127]
Programming Note
This instruction is used to manipulate the exponent and sign of a quad-precision floating-point number. Ensure that VSX (Vector Scalar Extensions) is enabled in the MSR register before using this instruction; otherwise, it will raise an exception. The operation requires proper alignment of the input registers, specifically for doubleword access in VRB. This instruction operates at the user privilege level and does not generate exceptions under normal conditions.