xscvsqqp

VSX Scalar Convert with round Signed Quadword to Quad-Precision

xscvsqqp VRT,VRB

Converts a signed quadword integer to a quad-precision floating-point number and rounds it.

Encoding

Binary Layout

0:5

VRT

6:10

11:15

VRB

16:20

836

21:31

Format X-form

Opcode 0xFC0B0688

Extension VSX

Operands

VRT
Target Vector Register
VRB
Source Vector Register

Example

xscvsqqp v1, v3

Registers Altered

FPSCR (FPRF, FR, FI, FX, XX)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The instruction converts the 128-bit signed integer value in VSR[VRB+32] to an unbounded-precision floating-point value, rounds it to quad-precision using the rounding mode specified by RN, and places the result into VSR[VRT+32].

Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src ←bfp_CONVERT_FROM_SI128(VSR[VRB+32])
rnd ←bfp_ROUND_TO_BFP128(0, FPSCR.RN, src)
result ←bfp128_CONVERT_FROM_BFP(rnd)
if xx_flag=1 then SetFX(XX)
VSR[VRT+32] ←result
FPSCR.FPRF ←fprf_CLASS_BFP128(result)
FPSCR.FR ←inc_flag
FPSCR.FI ←xx_flag

Programming Note

This instruction is used to convert a 128-bit signed integer to a quad-precision floating-point number with rounding. Ensure the VSX feature is enabled in the MSR register. Be cautious of the rounding mode specified by FPSCR.RN, as it affects the precision and result of the conversion. The instruction updates several special registers like FPSCR.FPRF, FPSCR.FR, and FPSCR.FI to reflect the operation's outcome.