xsminjdp

Vector Scalar Minimum of Double-Precision Floating-Point Values

xsminjdp XT, XA, XB

Compares two double-precision floating-point values and selects the minimum value, handling special cases like NaNs and zeros.

Details

The xsminjdp instruction computes the minimum of the double-precision floating-point value in doubleword element 0 of VSR[XA] (src1) and the double-precision floating-point value in doubleword element 0 of VSR[XB] (src2). The result is placed in doubleword element 0 of VSR[XT], with doubleword element 1 set to 0. FPRF, FR, and FI are not modified.

Pseudocode Operation

if src1 is QNaN or SNaN then
    fx(VXSNAN)
else if src2 is QNaN or SNaN then
    fx(VXSNAN)
else if src1 is +Infinity and src2 is +Infinity then
    T(src2)
else if src1 is -Infinity and src2 is -Infinity then
    T(src2)
else if src1 is +Zero and src2 is -Zero then
    T(-Zero)
else if src1 is -Zero and src2 is +Zero then
    T(-Zero)
else if src1 is +NZF and src2 is +NZF then
    T(M(src1,src2))
else if src1 is -NZF and src2 is -NZF then
    T(M(src1,src2))
else if src1 is +Zero and src2 is +NZF then
    T(-Zero)
else if src1 is +NZF and src2 is +Zero then
    T(-Zero)
else if src1 is -Zero and src2 is -NZF then
    T(-Zero)
else if src1 is -NZF and src2 is -Zero then
    T(-Zero)
else if src1 is +Infinity and src2 is not +Infinity then
    T(src2)
else if src1 is not +Infinity and src2 is +Infinity then
    T(src1)
else if src1 is -Infinity and src2 is not -Infinity then
    T(src2)
else if src1 is not -Infinity and src2 is -Infinity then
    T(src1)

Programming Note

['xsminjdp can be used to implement the Java min() function for single-precision and double-precision arguments.', 'Java only recognizes the concept of a NaN, but does not distinguish any difference between different NaN encodings, including between a QNaN and a SNaN. As a result, a SNaN operand is propagated as a SNaN (i.e., not converted to a QNaN).', 'Despite Java not recognizing the concept of exception status, VXSNAN is set to 1 if either operand is a SNaN.', 'Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.']

Example

xsminjdp vs1, vs2, vs3

Encoding

Binary Layout
111100
0
XA
6
XB
11
XT
16
000000
21
010001101000
29
 
Format XX3-form
Opcode 0xF00000A8
Extension VSX
Registers Altered FPSCR (FX, VXSNAN)

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B