dststt
Data Stream Touch for Store Transient
dststt RA, RB, STRM
Initiates a transient prefetch for writing.
Details
Initiates a hardware prefetch stream for transient (non-temporal) data that is likely to be written in the near future and not reused. The instruction computes an effective address from RA and RB and hints to the memory subsystem to prepare the cache line for write operations with transient semantics. This advisory instruction supports transient store-stream prefetching to reduce cache pollution.
Pseudocode Operation
EA ← (RA | 0) + RB; InitiateDataStream(EA, STRM, isStore=1, isTransient=1)
Example
dststt r4, r5, 0
Encoding
Binary Layout
31
0
STRM
6
RA
11
RB
16
374
21
/
31
Operands
-
RA
Base -
RB
Index -
STRM
Stream ID