vsububs

Vector Subtract Unsigned Byte Saturate

vsububs vD, vA, vB

Subtracts the contents of two vector registers and saturates the result to zero if it underflows.

Details

For vsububs, each byte element in VSR[VRA+32] is subtracted from the corresponding byte element in VSR[VRB+32]. If the result is less than zero, it saturates to zero and sets the SAT flag in VSCR.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    src1 ←EXTZ(VSR[VRA+32].byte[i])
    src2 ←EXTZ(VSR[VRB+32].byte[i])
    VSR[VRT+32].byte[i] ←ui8_CLAMP(src1 + ¬src2 + 1)
end

Programming Note

Use vsububs for subtracting unsigned byte elements with saturation. Ensure vectors are properly aligned and check VSCR.SAT to verify saturation occurred. Requires vector facility enabled; otherwise, triggers an exception.

Example

vsububs vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
1536
 
Format VX-form
Opcode 0x10000600
Extension VMX (AltiVec)
Registers Altered VSCR.SAT

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register