mbar
Memory Barrier
mbar MO
Ensures memory access ordering (Embedded version of 'sync').
Details
Provides memory barrier semantics for embedded processors, ensuring correct ordering of memory accesses according to the MO field. This is the embedded equivalent of the sync instruction and does not affect any condition registers. The MO field specifies the type of barrier required (0 for full synchronization).
Pseudocode Operation
Perform memory synchronization based on MO field
wait until all prior memory accesses complete
Example
mbar 0
Encoding
Binary Layout
31
0
0
6
0
11
MO
16
854
21
/
31
Operands
-
MO
Ordering