ps_add

Paired Single Add

ps_add FRT, FRA, FRB

Adds two paired singles.

Encoding

Binary Layout

60

0:5

FRT

6:10

FRA

11:15

FRB

16:20

21

21:31

 

Format A-form

Opcode 0xF0000015

Extension VMX (AltiVec)

Operands

• FRT
  Target
• FRA
  Src A
• FRB
  Src B

Example

ps_add f1, f2, f3

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Adds two pairs of single-precision floating-point values element-wise, storing the result in FRT. Each of the two single-precision elements in FRA and FRB is added independently. May set FPSCR status flags if exceptions occur.

Operation

FPR[FRT].upper ← FPR[FRA].upper + FPR[FRB].upper
FPR[FRT].lower ← FPR[FRA].lower + FPR[FRB].lower