vbrh
Vector Byte-Reverse Halfword
vbrh vD, vB
Reverses bytes within each halfword (Endian Swap).
Encoding
Binary Layout
4
0:5
vD
6:10
0
11:15
vB
16:20
1606
21:31
Operands
-
vD
Target -
vB
Source
Example
vbrh vd, vb
Related
More in VMX (AltiVec)
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Reverses the order of bytes within each halfword (16-bit element) of the source vector, effectively performing a 16-bit endianness swap. The operation processes all 8 halfwords in the 128-bit vector independently. This instruction requires VMX/AltiVec support and does not affect any status registers.
Operation
for i = 0 to 7 do
VR[vD][i*16:i*16+15] ← reverse_bytes(VR[vB][i*16:i*16+15])
end for