vandc

Vector AND with Complement

vandc vD, vA, vB

Bitwise AND of vA with the ones' complement of vB (vA & ~vB).

Details

Performs a bitwise AND of vA with the ones' complement of vB, effectively computing vA & ~vB, and stores the result in vD. Each bit is set in the result only if it is set in vA and clear in vB. No status flags are affected.

Pseudocode Operation

vD ← vA & ~vB

Programming Note

The vandc instruction requires the Vector Facility to be enabled; otherwise, it will raise an exception. Ensure that the MSR.VEC bit is set before using this instruction. This operation is useful for masking bits where you want to retain certain bits while complementing others.

Example

vandc vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
1092
21
 
Format VX-form
Opcode 0x10000444
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B