dfadd

Decimal Floating-Point Add

dfadd DRT,DSRC1,DSRC2

Adds two decimal floating-point numbers.

Details

Adds two Decimal Floating-Point operands and stores the result in the destination register. This is a Decimal Floating-Point operation that updates FPSCR flags for rounding, underflow, overflow, and other exceptions as determined by the current rounding mode and exception control bits.

Pseudocode Operation

DRT ← DSRC1 +DFP DSRC2
# FPSCR[FPRF, FR, FI, C, U, O, RX] updated accordingly

Programming Note

The dfadd instruction is used for adding two decimal floating-point numbers. Ensure that the source registers (DSRC1 and DSRC2) are properly aligned and contain valid decimal floating-point values to avoid exceptions. The result is stored in the target register (DRT). Be aware of the FPSCR register, which may affect rounding modes and exception flags.

Example

dfadd f1, vs2, vs3

Encoding

Binary Layout
18
0
OPCODE
6
RC
31
 
Format X-form
Opcode
Extension Decimal Floating-Point
Registers Altered FPSCR

Operands

  • DRT
    Target Decimal Floating-Point Register
  • DSRC1
    Source Decimal Floating-Point Register
  • DSRC2
    Source Decimal Floating-Point Register