srad

Shift Right Algebraic Doubleword

srad RA, RS, RB

Arithmetic right shift of 64-bit value (preserves sign).

Details

Arithmetically shifts RS right by the number of bit positions specified in RB (bits 57–63), preserving the sign bit (bit 0) and shifting in sign-extended bits. If RB ≥ 64, the result is all 0s or all 1s depending on sign. The XER[CA] carry bit is set if any 1-bits are shifted out from a negative number.

Pseudocode Operation

n ← RB[57:63]
if n < 64 then
  RA ← RS >>a n
  XER[CA] ← 1 if (RS < 0 & (RS & MASK(64-n, 63)) ≠ 0) else 0
else
  if RS < 0 then RA ← -1; XER[CA] ← 1
  else RA ← 0; XER[CA] ← 0

Programming Note

The srad instruction is commonly used for right-shifting signed integers while preserving the sign bit. Be cautious with shift amounts of 32 or more, as they result in a full sign extension and clear the carry bits. Ensure that the input register RS contains valid data and that RB's upper 8 bits specify a valid shift amount (0-63).

Example

srad r4, r3, r5

Encoding

Binary Layout
31
0
RS
6
RA
11
RB
16
794
21
 
Format X-form
Opcode 0x7C000634
Extension Base

Operands

  • RA
    Target
  • RS
    Source
  • RB
    Shift Reg