dcbf
Data Cache Block Flush
dcbfl RA,RB
dcbflp RA,RB
dcbfps RA,RB
dcbstps RA,RB
Flushes the cache block from the data cache to main memory and invalidates it. Used for DMA coherency.
Details
The dcbf instruction flushes a block of data from the cache to main storage. The L operand specifies the scope and behavior of the flush operation.
Pseudocode Operation
if 'dcbf' then
EA <- (RA) + (RB)
if L = 0 then
// Perform flush for Memory Coherence Required storage
else if L = 1 then
// Flush only the data cache of this processor
else if L = 3 then
// Flush only the primary data cache of this processor
else if L = 4 then
// Flush to persistent storage
else if L = 6 then
// Store to persistent storage and flush
Programming Note
dcbf serves as both a basic and an extended mnemonic. The Assembler will recognize a dcbf mnemonic with three operands as the basic form, and a dcbf mnemonic with two operands as the extended form. In the extended form the L operand is omitted and assumed to be 0. dcbf with L=1 can be used to provide a hint that a block in this processor’s data cache will not be reused soon. dcbf with L=3 can be used to flush a block from the processor’s primary data cache but reduce the latency of a subsequent access. For example, the block may be evicted from the primary data cache but a copy retained in a lower level of the cache hierarchy.
Extended Mnemonics
| Extended Mnemonic | Equivalent Instruction |
|---|---|
| dcbfl | |
| dcbflp | |
| dcbfps | |
| dcbstps | |
Example
Encoding
Operands
-
RA
Base Address -
RB
Index Address -
L
Level of cache flush (0, 1, 3, 4, 6) -
RT
Target General Purpose Register