vinshvrx

Vector Insert Halfword from VSR using GPR-specified Right-Index VX-form

vinshvrx VRT,RA,VRB

Inserts a halfword from a vector register into another vector register at a position specified by a general-purpose register.

Encoding

Binary Layout
00101 001111
 
Format VX-form
Opcode 0x1000014F
Extension VMX (AltiVec)

Operands

  • VRT
    Target vector register. Bits 48:63 of VSR[VRB+32] are placed into its byte elements 14-index:15-index.
  • RA
    General purpose register whose bits 60:63 supply the byte index, counted from the right end of the target.
  • VRB
    Source vector register supplying the halfword held in its bits 48:63.

Example

vinshvrx

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Inserts a halfword-sized element from one vector register into another vector register at a byte position determined by the contents of a general-purpose register. This VMX (AltiVec) category instruction does not affect condition register or status fields. The GPR value specifies the insertion position within the destination vector.

Operation

index ← GPR[RA].bit[60:63]
VSR[VRT+32].byte[14-index:15-index] ← VSR[VRB+32].bit[48:63]
If index is greater than 14, the result is undefined.

Programming Note

The vinshvrx instruction is useful for selectively updating a halfword within a vector register based on a dynamic index provided by a general-purpose register. Ensure that the right-index specified in the GPR does not exceed the bounds of the 16-byte vector to avoid undefined behavior. This instruction operates at user privilege level and does not generate exceptions under normal circumstances, but incorrect indexing can lead to data corruption.