vextractuh
Vector Extract Unsigned Halfword
vextractuh RA, vB, UIM
Extracts a halfword from a vector into a GPR.
Encoding
Binary Layout
4
0:5
RA
6:10
UIM
11:15
vB
16:20
589
21:31
Operands
-
RA
Target GPR -
vB
Source Vector -
UIM
Index
Example
vextractuh r4, vb, uim
Related
More in VMX (AltiVec)
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Extracts an unsigned halfword element from vB at the position specified by UIM and stores the zero-extended 16-bit value into general-purpose register RA. The halfword index (0-7) is provided by the 3-bit immediate UIM. No status flags are affected. This instruction is part of the VMX (AltiVec) extension.
Operation
index ← UIM[1:3]
RA ← (0x0000) || vB[index*16 : index*16+15]
Programming Note
The vextractuh instruction extracts an unsigned halfword from a vector register at a specified index. Ensure the index is within bounds to avoid undefined behavior. This instruction operates in user privilege level and does not generate exceptions for valid indices.