vextsb2w

Vector Extend Sign Byte To Word

vextsb2w vD, vB

Sign-extends each byte in a vector to a word.

Details

For vextsb2w, the signed integer in bits 24:31 of each word element of VSR[VRB+32] is sign-extended and placed into the corresponding word element of VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 3
    src ← VSR[VRB+32].word[i].bit[24:31]
    VSR[VRT+32].word[i] ← EXTS32(src)
end

Programming Note

This instruction is used to sign-extend the most significant byte of each word in a vector register. Ensure that the Vector Facility (VEC) bit in the Machine State Register (MSR) is set; otherwise, a Vector Unavailable exception will be raised. The operation processes four words per vector register, and it's important to handle exceptions properly to avoid program crashes.

Example

vextsb2w vd, vb

Encoding

Binary Layout
4
0
VRT
6
16
11
VRB
16
1538
21
 
Format VX-form
Opcode 0x10000606
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vB
    Source
  • VRT
    Target Vector Register
  • VRB
    Source Vector Register