mulld

Multiply Low Doubleword

mulld RT,RA,RB

Multiplies the contents of two registers and places the low-order 64 bits of the product into a target register.

Encoding

Binary Layout

31

0:5

RT

6:10

RA

11:15

RB

16:20

OE

21

233

22:30

Rc

31

 

Format XO-form

Opcode 0x7C0001D2

Extension Base

Operands

• RT
  Target
• RA
  Src 1
• RB
  Src 2

Example

mulld r3, r4, r5

// 64-bit multiply.

Registers Altered

CR0, XER

Related

Across architectures

Integer Multiply : how x86, ARM, RISC-V, and PowerISA each do this.

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The 64-bit operands are (RA) and (RB). The low-order 64 bits of the 128-bit product of the operands are placed into register RT. Both operands and the product are interpreted as signed integers.

Operation

prod0:127 ← (RA) × (RB)
RT ← prod0:63
if OE=1 then
    OV and OV32 are set to 1 if the product cannot be represented in 64 bits.

Programming Note

The XO-form Multiply instructions may execute faster on some implementations if RB contains the operand having the smaller absolute value.