mtocrf

Move To One Condition Register Field

mtocrf FXM, RS

Moves a GPR field to a single CR field.

Encoding

Binary Layout

31

0:5

RS

6:10

FXM

11:18

144

19:30

/

31

 

Format XFX-form

Opcode 0x7C100120

Extension Base

Operands

• FXM
  Mask
• RS
  Source

Example

mtocrf 0xFF, r3

Registers Altered

CR

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Moves a single condition register field from a GPR to the condition register, using FXM as a mask to select which CR field (CR0-CR7) receives the update. The FXM field must have only one bit set to specify a single CR field; CR bits outside the selected field are unchanged.

Operation

// Move GPR bits [0:31] to CR field selected by FXM
for i in 0 to 7:
  if FXM[i] = 1 then
    CR[i*4:(i+1)*4] ← RS[i*4:(i+1)*4]

Programming Note

The mtocrf instruction is used to transfer a specific field from the Condition Register (CR) to a general-purpose register. Ensure that exactly one bit in the FXM field is set to avoid undefined behavior of the Condition Register. This instruction operates at user privilege level and does not generate exceptions under normal conditions.