xsresp

VSX Scalar Reciprocal Estimate Single-Precision

xsresp XT,XB

Estimates the reciprocal of a single-precision floating-point value.

Details

The xsresp instruction estimates the reciprocal of a single-precision floating-point value in doubleword element 0 of VSR[XB] and places the result into doubleword element 0 of VSR[XT].

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src ← bfp_CONVERT_FROM_BFP64(VSR[VRB+32].dword[0])
v ← bfp_RECIPROCAL_ESTIMATE(src)
rnd ← bfp_ROUND_TO_BFP32(FPSCR.RN, v)
result32 ← bfp32_CONVERT_FROM_BFP(rnd)
result64 ← bfp64_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if 0bU then SetFX(FPSCR.XX)
vex_flag ← FPSCR.VE & vxsnan_flag
zex_flag ← FPSCR.ZE & zx_flag
if vex_flag=0 & zex_flag=0 then do
    VSR[32×TX+T].dword[0] ← result64
    VSR[32×TX+T].dword[1] ← 0x0000_0000_0000_0000
    FPSCR.FPRF ← fprf_CLASS_BFP32(result32)
    FPSCR.FR ← 0bU
    FPSCR.FI ← 0bU
end else do
    FPSCR.FR ← 0b0
    FPSCR.FI ← 0b0
end

Programming Note

Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register.

Example

xsresp vs1, vs3

Encoding

Binary Layout
T
6
B
11
26
16
BX
21
TX
30
 
Format XX2-form
Opcode 0xF0000068
Extension VSX
Registers Altered FPSCR, VXSNAN

Operands

  • XT
    Target Vector-Scalar Register
  • XB
    Source Vector-Scalar Register