pmxvi4ger8

Prefixed Masked VSX Vector Integer 4-bit GER

pmxvi4ger8 AT, XA, XB, XMSK, YMSK

Masked 4-bit integer matrix multiply.

Details

The pmxvi4ger8 instruction performs a masked vector integer 4-bit GER operation on VSX registers. It multiplies corresponding elements of two 16-bit signed integers from the source vectors, sums the products, and accumulates them into an accumulator register. The operation is performed only if the corresponding mask bits are set.

Pseudocode Operation

For each integer value i from 0 to 3 and each integer value j from 0 to 3,
    If bit i of XMSK is equal to 1 and bit j of YMSK is equal to 1, do the following.
        prod0 ← EXTS(VSR[XA][i][0]) * EXTS(VSR[XB][j][0]) if PMSK[0] == 1 else 0
        prod1 ← EXTS(VSR[XA][i][1]) * EXTS(VSR[XB][j][1]) if PMSK[1] == 1 else 0
        sum ← prod0 + prod1
        result ← si32_CLAMP(sum)
        ACC[AT][i][j] ← result
    Else,
        ACC[AT][i][j] ← 0x0000_0000.

Programming Note

The pmxvi4ger8 instruction is useful for performing masked vector integer operations, multiplying and accumulating products of signed integers from two vectors based on a mask. Ensure that the mask registers (XMSK, YMSK) are correctly set to control which elements are processed. The operation requires proper alignment of VSX registers, and results are clamped to 32-bit signed integers to prevent overflow. This instruction operates at privilege level 0.

Example

pmxvi4ger8 acc0, vs2, vs3, 15, 15

Encoding

Binary Layout
1
0
3
6
PMSK
8
XMSK
9
YMSK
14
0
32
59
38
AT
41
/
43
XA
48
XB
53
3
56
AX
57
BX
58
/
 
Format MMIRR-form
Opcode 0x06000000
Extension Prefixed

Operands

  • AT
    Accumulator
  • XA
    Src A
  • XB
    Src B
  • XMSK
    Mask A
  • YMSK
    Mask B