rldicr
Rotate Left Doubleword Immediate Clear Right
rldicr RA, RS, SH, ME
Rotates 64-bit RS left by SH, then clears the low-order bits (ME+1 to 63).
Encoding
Binary Layout
30
0:5
RS
6:10
RA
11:15
SH
16:20
ME
21:26
01
27:30
Rc
31
Operands
-
RA
Target -
RS
Source -
SH
Shift Amount -
ME
Mask End
Example
rldicr r3, r4, 2, 60
// Align address to 8 bytes.
Registers Altered
CR0Related
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Rotates the 64-bit contents of RS left by SH positions, then clears bits (ME+1) through 63, effectively creating a mask from bit 0 through ME. The condition register CR0 is updated if Rc=1.
Operation
n ← SH
mask ← MASK(0, ME)
rotated ← ROTL64(RS, n)
RA ← rotated & mask
if Rc = 1 then CR0 ← (RA < 0, RA > 0, RA = 0, SO)
Programming Note
When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.