pextd

Parallel Bits Extract Doubleword

pextd RA, RS, RB

Extracts bits from a source register based on a mask and places them into the target register.

Encoding

Binary Layout

31

0:5

RS

6:10

RA

11:15

RB

16:20

132

21:30

/

31

 

Format X-form

Opcode 0x7C000178

Extension Base

Operands

• RA
  Target
• RS
  Source
• RB
  Mask

Example

pextd r4, r3, r5

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of the bits in register RS corresponding to bits in mask containing a 1 are packed into an n-bit value. The extracted value is placed into register RA.

Operation

result ← 0
mask ← (RB)
m ← 0
k ← 0
do while (m < 64) 
    if ((RB)63-m == 1) then do
        result63-k ← (RS)63-m
        k ← k + 1
    end
    m ← m + 1
end
RA ← result

Programming Note

The pextd instruction is useful for extracting and packing bits from a source register based on a mask. Ensure the mask register (RB) has bits set to 1 where you want to extract corresponding bits from the source register (RS). The operation is performed in little-endian order, so the least significant bit of the result corresponds to the first bit set in the mask. This instruction operates at user privilege level and does not generate exceptions for normal use cases.