xsnegdp

VSX Scalar Negate Double-Precision

xsnegdp XT, XB

Negates the contents of a double-precision floating-point register and stores the result in another register.

Details

The instruction negates the value in VSR[32×BX+B].dword[0] (which represents a single-precision floating-point number) and places the result into VSR[32×TX+T].dword[0]. The contents of doubleword element 1 of VSR[XT] are set to 0.

Pseudocode Operation

if MSR.VSX=0 then
    VSX_Unavailable()
src ←VSR[32×BX+B].dword[0]
VSR[32×TX+T].dword[0] ←bfp64_NEGATE(src)
VSR[32×TX+T].dword[1] ←0x0000_0000_0000_0000

Programming Note

['This instruction can be used to operate on a single-precision source operand.', 'Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.']

Example

xsnegdp vs1, vs3

Encoding

Binary Layout
60
0
T
11
B
16
BX
21
TX
26
0
30
0
31
 
Format XX2-form
Opcode 0xF0000169
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target
  • XB
    Source