vclzh

Vector Count Leading Zeros Halfword

vclzh vD, vB

Counts leading zeros in each halfword.

Details

The Vector Count Leading Zeros Halfword instruction counts the number of consecutive zero bits starting from bit 0 for each halfword element in the source vector register and stores the result in the destination vector register. The count ranges from 0 to 16, inclusive.

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
do i = 0 to 7
   n ←0
   do while n < 16
      if VSR[VRB+32].hword[i].bit[n] = 0b1 then
         leave
      n ←n + 1
   end
   VSR[VRT+32].hword[i] ←n
end

Programming Note

The vclzh instruction is useful for counting leading zeros in each halfword of a vector, which can be helpful in various bit manipulation tasks. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, it will raise an exception. The instruction processes 8 halfwords per vector register, and results are stored directly in the destination vector register.

Example

vclzh vd, vb

Encoding

Binary Layout
4
0
vD
6
0
11
vB
16
1858
21
 
Format VX-form
Opcode 0x10000742
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vB
    Source