stmw

Store Multiple Word

stmw RT, D(RA)

Stores words from registers RT through R31 to memory (Context Switch).

Details

The stmw instruction stores multiple words from a register file into consecutive memory locations starting at an effective address calculated from a base register and a displacement. The words are stored in reverse order compared to their original positions in the register file.

Pseudocode Operation

if RA = 0 then b ← 0
else           b ← (RA)
EA ← b + D
MEM(EA, 4) ← RS[32:63]
MEM(EA+4, 4) ← RS[24:31]
MEM(EA+8, 4) ← RS[16:23]
MEM(EA+12, 4) ← RS[0:7]

Programming Note

Loads (or stores) a sequence of GPRs from consecutive word-aligned memory locations. Not pipelined on most implementations; for bulk data movement consider using vector or floating-point load/store multiples instead.

Example

stmw r3, 0(r4)

Encoding

Binary Layout
47
0
RT
6
RA
11
D
16
 
Format D-form
Opcode 0xBC000000
Extension Base

Operands

  • RT
    Start Register
  • D
    Displacement
  • RA
    Base