lxvrdx

Load VSX Vector Rightmost Doubleword Indexed X-form

lxvrdx XT,RA,RB

Loads a doubleword from memory into the rightmost element of a VSX vector register.

Encoding

Binary Layout

0

0:5

T

6:10

RA

11:15

RB

16:20

109

21:25

TX

26:31

 

Format X-form

Opcode 0x7C0000DA

Extension VSX

Operands

• XT
  Target VSX Vector Register
• RA
  Source General Purpose Register (address base)
• RB
  Source General Purpose Register (offset)

Example

lxvrdx vs1, r4, r5

Registers Altered

MSR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Loads a 64-bit doubleword from memory and places it in the rightmost (least significant) doubleword element of a VSX register, with the left doubleword set to 0. The effective address is computed as RA|0 + RB. No status fields are modified by this instruction.

Operation

EA ← (RA=0 ? 0 : GPR[RA]) + GPR[RB]
VSR[XT] ← (0x0000000000000000 || MEM(EA, 8))

Programming Note

The lxvrdx instruction is used to load a doubleword from memory into the rightmost element of a VSX vector register. Ensure that the VSX facility is enabled in the MSR register; otherwise, a VSX_Unavailable exception will be raised. The address calculation uses two general-purpose registers, RA and RB, where RA can be zero. Be cautious of alignment requirements for optimal performance and to avoid potential exceptions.