xvsqrtdp
VSX Vector Square Root Double-Precision
xvsqrtdp XT, XB
Computes the square root of each double-precision floating-point element in a vector.
Encoding
Binary Layout
60
0:5
XT
6:10
0
11:15
XB
16:20
203
21:31
Operands
-
XT
Target -
XB
Source
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
For xvsqrtdp, the unbounded-precision square root of each double-precision floating-point operand in doubleword elements of VSR[XB] is computed and rounded to double-precision format. The result is placed into corresponding elements of VSR[XT].
Operation
if MSR.VSX=0 then VSX_Unavailable()
ex_flag ←0b0
do i = 0 to 1
reset_xflags()
src ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[i])
v ←bfp_SQUARE_ROOT(src)
rnd ←bfp_ROUND_TO_BFP64(0b0,FPSCR.RN,v)
vresult.dword[i] ←bfp64_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if vxsqrt_flag=1 then SetFX(FPSCR.VXSQRT)
if xx_flag=1 then SetFX(FPSCR.XX)
ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag) | (FPSCR.VE & vxsqrt_flag) | (FPSCR.XE & xx_flag)
end
if ex_flag=0 then VSR[32×TX+T] ←vresult
Programming Note
The xvsqrtdp instruction computes the square root of each double-precision floating-point operand in a vector. Ensure that VSX is enabled by checking MSR.VSX. Handle exceptions by examining FPSCR flags such as VXSNAN, VXSQRT, and XX. The instruction operates on aligned data and requires supervisor privilege level.