xvrdpiz

Vector Round to Double-Precision Integer using round toward Zero

xvrdpiz XT,XB

Rounds each double-precision floating-point element in a vector towards zero and stores the result as an integer.

Details

The instruction rounds each double-precision floating-point element in VSR[XB] towards zero and stores the result in VSR[XT]. If any element is a Signalling NaN, it is converted to a Quiet NaN and VXSNAN is set. If a trap-enabled exception occurs, no results are written to VSR[XT].

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()

ex_flag ←0b0
do i = 0 to 1
    reset_xflags()
    src ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[i])
    rnd ←bfp_ROUND_TO_INTEGER(0b001, src)
    vresult.dword[i] ←bfp64_CONVERT_FROM_BFP(rnd)
    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag)
end

if ex_flag=0 then VSR[32×TX+T] ←vresult

Programming Note

This instruction is commonly used for converting double-precision floating-point numbers to integers by rounding towards zero. Be cautious with Signalling NaNs, as they are converted to Quiet NaNs and VXSNAN is set. Ensure that the VSX facility is enabled; otherwise, a VSX_Unavailable exception will occur. The instruction does not write results if any trap-enabled exceptions happen.

Example

xvrdpiz vs1, vs3

Encoding

Binary Layout
18
0
T
6
B
11
BX
16
TX
21
 
Format XX2-form
Opcode 0xF0000364
Extension VSX
Registers Altered FPSCR, VXSNAN

Operands

  • XT
    Target Vector-Specific Register
  • XB
    Source Vector-Specific Register