mcrxrx

Move to Condition Register from XER Extended

mcrxrx BF

Copies the contents of the XER register fields OV, OV32, CA, and CA32 to the specified condition register field.

Encoding

Binary Layout

0

0:5

BF

6:10

//

11:15

RS

16:20

FXM

21:30

//

31

 

Format X-form

Opcode 0x7C000480

Extension Base

Operands

• BF
  Target CR Field
• RS
  Source General Purpose Register

Example

mcrxrx cr0

Registers Altered

CR, XER

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of the OV, OV32, CA, and CA32 are copied to Condition Register field BF. The contents of bits 32:63 of register RS are placed into the Condition Register under control of the field mask specified by FXM.

Operation

mask ←4(FXM0) || 4(FXM1) || ... 4(FXM7)
CR ←((RS)32:63 & mask) | (CR & ¬mask)

Programming Note

The mcrxrx instruction is used to transfer specific bits from the XER register into the Condition Register. Ensure that the FXM field correctly specifies which bits of RS should be moved to CR, as incorrect masking can lead to unexpected results. This instruction operates at user privilege level and does not generate exceptions under normal conditions.