icbt

Instruction Cache Block Touch

icbt RA, RB

Provides a hint that the program will soon execute code from the block containing the byte addressed by EA, and that the block should be loaded into the cache specified by the CT field.

Details

The icbt instruction provides a hint that the program will probably soon execute code from the block containing the byte addressed by EA, and that the block containing the byte addressed by EA is to be loaded into the cache specified by the CT field. If the CT field is set to a value not supported by the implementation, no operation is performed.

Pseudocode Operation

if 'icbt' then
    EA <- (RA|0) + (RB)
    if block containing EA is in storage that is Memory Coherence Required and a block containing EA is in the instruction cache of any processors, invalidate block in those caches
    if block containing EA is in storage that is not Memory Coherence Required and the block is in the instruction cache of this processor, invalidate block in that cache

Programming Note

['The hint is ignored if the block is Caching Inhibited.', 'This instruction treated as a Load (see Section 4.3), except that the system data storage error handler is not invoked, and reference and change recording need not be done.']

Example

icbt r4, r5

Encoding

Binary Layout
31
0
/
6
RA
30
RB
31
22
/
 
Format X-form
Opcode 0x7C00002C
Extension Base

Operands

  • RA
    Base
  • RB
    Index
  • CT
    Cache Type Field