icblc

Instruction Cache Block Lock Clear

icblc CT, RA, RB

Clears an instruction cache line lock.

Encoding

Binary Layout

31

0:5

CT

6:10

RA

11:15

RB

16:20

230

21:30

/

31

 

Format X-form

Opcode 0x7C0001CC

Extension Embedded

Operands

• CT
  Target
• RA
  Base
• RB
  Index

Example

icblc 0, r4, r5

Related

More in Embedded

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Clears the instruction cache block lock at the address computed from RA + RB. The CT field specifies the cache block class to unlock. This is an embedded (SPE/VLE) instruction used in cache management and requires careful synchronization in multi-threaded environments.

Operation

EA ← (RA) + (RB)
Clear_ICacheBlockLock(EA, CT)