pstw

Prefixed Store Word

pstw RS, D(RA), R

Stores word using 34-bit offset.

Details

Stores the least significant 32 bits of the source register to memory using a 34-bit signed offset (split between prefix and suffix). The effective address is computed from a base register or the program counter (determined by the R bit), supporting both absolute and PC-relative addressing modes. This is a two-instruction prefixed store with no condition register or status flag effects.

Pseudocode Operation

D ← EXTS(D0 || D1)
EA ← if R = 0 then (if RA = 0 then 0 else GPR[RA]) + D else CIA + D
MEM(EA, 4) ← GPR[RS][32:63]

Programming Note

The pstw instruction is used to store a word from a source register into memory. It supports different addressing modes based on the prefix field and privilege level. Ensure that the base address in RA is properly aligned for optimal performance, and be cautious of potential exceptions if the EA calculation results in an invalid address.

Example

pstw r3, 0(r4), 0

Encoding

Binary Layout
1
0
2
6
R
8
0
9
D0
14
36
32
RS
38
RA
43
D1
48
 
Format MLS:D-form
Opcode 0x0600000090000000
Extension Prefixed

Operands

  • RS
    Source
  • D
    Offset
  • RA
    Base
  • R
    PC-Rel