pmxvf16ger2np

Prefixed Masked VSX Vector 16-bit Floating-Point GER (rank-2 update) Negative multiply, Positive accumulate

pmxvf16ger2np AT,XA,XB,XMSK,YMSK,PMSK

Performs a masked vector operation with negative multiplication and positive accumulation.

Details

The instruction performs a masked vector operation where the elements of two vectors are multiplied and accumulated based on the mask values provided.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()

if 'xvf16ger2' | 'xvf16ger2pp' | 'xvf16ger2pn' | 'xvf16ger2np' | 'xvf16ger2nn' then do
   PMSK ←0b11
   XMSK ←0b1111
   YMSK ←0b1111
end

do i = 0 to 3
   do j = 0 to 3
      if XMSK.bit[i] & YMSK.bit[j] then do
         reset_flags()

         src10 ←bfp_CONVERT_FROM_BFP16((PMSK.bit[0]=0) ? 0x0000 : VSR[32×AX+A].word[i].hword[0])
         src11 ←bfp_CONVERT_FROM_BFP16((PMSK.bit[1]=0) ? 0x0000 : VSR[32×AX+A].word[i].hword[1])
         src20 ←bfp_CONVERT_FROM_BFP16((PMSK.bit[0]=0) ? 0x0000 : VSR[32×BX+B].word[j].hword[0])
         src21 ←bfp_CONVERT_FROM_BFP16((PMSK.bit[1]=0) ? 0x0000 : VSR[32×BX+B].word[j].hword[1])

         p1    ←bfp_MULTIPLY(src10, src20)
         v1    ←bfp_MULTIPLY_ADD(src11, src21, p1)
         r1    ←bfp_ROUND_TO_BFP32_DEFAULT(FPSCR.RN, v1)

         if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
         if vximz_flag=1 then SetFX(FPSCR.VXIMZ)
         if vxisi_flag=1 then SetFX(FPSCR.VXISI)
         if ox_flag=1 then SetFX(FPSCR.OX)
         if ux_flag=1 then SetFX(FPSCR.UX)
         if xx_flag=1 then SetFX(FPSCR.XX)

         reset_flags()

         if '[pm]xvf16ger2' then
            ACC[AT][i].word[j] ←bfp32_CONVERT_FROM_BFP(r1)

         else do
            acc ←bfp_CONVERT_FROM_BFP32(ACC[AT][i].word[j])

            if '[pm]xvf16ger2pp' then v2 ←bfp_ADD(r1, acc)
            if '[pm]xvf16ger2pn' then v2 ←bfp_ADD(r1, bfp_NEGATE(acc))
            if '[pm]xvf16ger2np' then v2 ←bfp_ADD(bfp_NEGATE(r1), acc)
            if '[pm]xvf16ger2nn' then v2 ←bfp_ADD(bfp_NEGATE(r1), bfp_NEGATE(acc))

            r2 ←bfp_ROUND_TO_BFP32_DEFAULT(FPSCR.RN, v2)
      end
   end
end

Programming Note

This instruction is used for performing masked vector operations on 16-bit floating-point numbers, with specific handling of negative and positive accumulations. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid exceptions. Pay attention to the mask values (PMSK, XMSK, YMSK) as they control which elements are processed. Be aware of potential floating-point exceptions such as VXSNAN, VXIMZ, VXISI, OX, UX, and XX, and handle them appropriately in your code.

Example

pmxvf16ger2np acc0, vs2, vs3, 15, 15, 3

Encoding

Binary Layout

PMSK

XMSK

YMSK

Format MMIRR:XX3-form

Opcode

Extension VSX

Registers Altered FPSCR, VXSNAN, VXIMZ, VXISI, OX, UX, XX

Operands

AT
Target Vector Register
XA
Source Vector Register A
XB
Source Vector Register B
XMSK
Mask for Source Vector XA
YMSK
Mask for Source Vector XB
PMSK
Mask for Product