xvcvspsxws

Vector Convert with round to zero Single-Precision to Signed Word format

xvcvspsxws XT,XB

Converts a vector of single-precision floating-point numbers to signed integers using round towards zero.

Encoding

Binary Layout

18

0:5

T

6:10

B

11:15

152

16:20

BX

21:25

TX

26:31

 

Format XX2-form

Opcode 0xF0000260

Extension VSX

Operands

• XT
  Target Vector Register
• XB
  Source Vector Register

Example

xvcvspsxws vs1, vs3

Registers Altered

FPSCR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Converts each single-precision floating-point element in XB to a signed 32-bit integer in XT, rounding towards zero. This is a VSX instruction operating element-wise on a vector of single-precision values. No condition registers or status fields are modified.

Operation

for i in 0 to 3 do
  XT[i*32:(i+1)*32-1] ← CVTSP_TO_SI_RZ(XB[i*32:(i+1)*32-1])
end for

Programming Note

xvcvspsxws rounds using Round towards Zero rounding mode. For other rounding modes, software must use a Round to Single-Precision Integer instruction that corresponds to the desired rounding mode.