andc

AND with Complement

andc RA, RS, RB

Performs a bitwise AND between RS and the one's complement of RB.

Details

Performs a bitwise AND between RS and the one's complement (bitwise NOT) of RB, storing the result in RA. This is equivalent to RS AND (NOT RB). Condition register CR0 is updated if Rc=1.

Pseudocode Operation

RA ← RS & ~RB
if Rc = 1 then
  CR0 ← (RA == 0, RA < 0, RA > 0, XER[SO])

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.

Example

andc r3, r4, r5

// r3 = r4 & ~r5

Encoding

Binary Layout
31
0
RS
6
RA
11
RB
16
60
21
Rc
31
 
Format X-form
Opcode 0x7C000078
Extension Base
Registers Altered CR0

Operands

  • RA
    Target Register
  • RS
    Source Register 1
  • RB
    Source Register 2