xvtlsbb

VSX Vector Test Least-Significant Bit by Byte

xvtlsbb BF,XB

Tests the least-significant bit of each byte in a VSX vector register and sets a condition register field based on the results.

Details

Tests the least-significant bit of each byte in VSX vector register XB and sets condition register field BF based on whether all tested bits are zero. Sets BF to reflect if all LSBs are 0 (CR field = 0b0010) or if any LSB is 1 (CR field = 0b0011). This is a VSX extension instruction.

Pseudocode Operation

all_zero ← 1
do i = 0 to 15
  if XB[i*8+7] = 1 then all_zero ← 0
enddo
if all_zero then
  CR[BF] ← 0b0010
else
  CR[BF] ← 0b0011
endif

Programming Note

This instruction following any Vector Compare provides the ability to direct the summary status of the Vector Compare to any CR field, not just CR field 6 when Rc=1.

Example

xvtlsbb cr0, vs3

Encoding

Binary Layout
18
0
BF
6
XB
9
 
Format XX2-form
Opcode 0xF002076C
Extension VSX
Registers Altered CR

Operands

  • BF
    Condition Register Field
  • XB
    Source VSX Vector Register