plwa

Prefixed Load Word Algebraic

plwa RT, D(RA), R

Loads 32-bit word (Sign Extended) using 34-bit offset.

Details

The Prefixed Load Word Algebraic (plwa) instruction loads a word from memory into the target register RT, zeroing out the upper 32 bits of RT. The effective address is calculated based on the prefix and suffix fields.

Pseudocode Operation

if RA = 0 then b ← 0
else           b ← (RA)
EA ← b + (RB)
RT ← 320 || MEM(EA, 4)

Programming Note

The plwa instruction is commonly used for loading a word from memory into a register while ensuring the upper 32 bits are zeroed. Ensure that the base address in RA and the offset in RB are correctly set to avoid incorrect memory access. This instruction operates at user privilege level and will raise an exception if the effective address is out of bounds or if there is a protection fault.

Example

plwa r3, 0(r4), 0

Encoding

Binary Layout
1
0
2
6
R
8
0
9
D0
14
41
32
RT
38
RA
43
D1
48
 
Format MLS:D-form
Opcode 0x06000000
Extension Prefixed

Operands

  • RT
    Target
  • D
    Offset
  • RA
    Base
  • R
    PC-Rel