pld

Prefixed Load Doubleword

pld RT, D34(RA), R

Loads a 64-bit value from memory using a 34-bit immediate offset (PC-relative or absolute).

Encoding

Binary Layout

1

0:5

2

6:7

R

8

0

9:13

D0

14:31

57

32:37

RT

38:42

RA

43:47

D1

48:63

 

Format MLS:D-form

Opcode 0x04000000E4000000

Extension Prefixed

Operands

• RT
  Target Register
• D34
  34-bit Displacement
• RA
  Base Register
• R
  PC-Relative Flag

Example

pld r3, label@pcrel(0), 1

// Load value from label.

Related

More in Prefixed

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Loads a 64-bit doubleword from memory at the address calculated from RA plus a 34-bit immediate displacement, storing the result in RT. When R=1, the displacement is PC-relative; when R=0, it is treated as absolute. This is a 64-bit prefixed instruction from the Prefixed extension.

Operation

if R = 1 then
  EA ← (RA | 0 if RA=0) + sign_extend(D34, 34) + CIA
else
  EA ← (RA | 0 if RA=0) + sign_extend(D34, 34)
RT ← [EA]

Programming Note

The pld instruction is commonly used for loading doubleword data from memory into a register. Ensure the base address and offset are correctly calculated to avoid accessing invalid memory locations. This instruction operates at user privilege level unless specified otherwise.