vnor

Vector NOR

vnor vD, vA, vB

Performs a logical NOR operation on the contents of two vector registers and stores the result in another vector register.

Encoding

Binary Layout

4

0:5

vD

6:10

vA

11:15

vB

16:20

1284

21:31

 

Format VX-form

Opcode 0x10000504

Extension VMX (AltiVec)

Operands

• vD
  Target
• vA
  Src A
• vB
  Src B
• VRT
  Target Vector Register
• VRA
  Source Vector Register
• VRB
  Source Vector Register

Example

vnor vd, va, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of VSR[VRA+32] are ORed with the contents of VSR[VRB+32], and the complemented result is placed into VSR[VRT+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
else
    VSR[VRT+32] ←¬( VSR[VRA+32] | VSR[VRB+32] )

Extended Mnemonics

Extended Mnemonic	Equivalent Instruction
vnot

Programming Note

The vnor instruction performs a bitwise NOR operation on two vector registers and stores the result in another register. Ensure that the Vector Facility is enabled by checking and setting the MSR.VEC bit; otherwise, a Vector_Unavailable exception will be raised. This instruction operates at the user privilege level.